1. Field of the Invention
The present invention relates to a magnetic random access memory (MRAM) which stores binary information using the magnetoresistive effect, and a data read method thereof and, more particularly, to potential control of main/sub bit lines and word lines in the read mode of a memory cell array in which cross-point memory cells are arranged by a divided bit line structure (hierarchical bit line scheme).
2. Description of the Related Art
MRAMs are devices which perform memory operation by storing binary information using the magnetoresistive effect. They are regarded as one of candidates for universal storage devices that can realize all the nonvolatility, high integration degree, high reliability, low power consumption, and high operation speed and have been developed in various companies.
Two effects, i.e., the GMR (Giant MagnetoResistive) effect and TMR (Tunneling MagnetoResistive) effects are mainly known as magnetoresistive effects. An element (GMR element) using the GMR effect stores information by using a phenomenon that the resistance of a conductor sandwiched between two ferromagnetic layers changes depending on the direction of spin of the ferromagnetic layers on the upper and lower sides. In the GMR element, however, the MR ratio that indicates the ratio of a change in magnetoresistance is as low as 10%. For this reason, the read signal of stored information is small. How to ensure the read margin presents a significant challenge in implementing MRAMs. The practical utility is believed to be still insufficient at present.
As a typical element which uses the TMR effect, an MTJ (Magnetic Tunnel Junction) element which uses a change in magnetoresistance due to a spin polarization tunneling effect is known. The MTJ element has a multilayered structure in which an insulating film (tunnel insulating film) is sandwiched between two metal layers formed from ferromagnetic layers. In the MTJ element, when the directions of spin of the upper and lower ferromagnetic layers are parallel, the tunnel probability between the two ferromagnetic layers through the tunnel insulating film is maximum. As a result, the resistance value is minimized. Conversely, when the directions of spin are anti-parallel, the tunnel probability is minimum. Accordingly the resistance is maximized. To realize the two spin states, normally, one of the ferromagnetic layers (magnetic films) has a fixed magnetization direction and is set not to receive the effect of external magnetization. Generally, the ferromagnetic layer with the fixed magnetization direction is called a pinned layer. The magnetization direction of the other ferromagnetic layer (magnetic film) can be programmed to be parallel or anti-parallel to the pinned layer in accordance with the direction of an applied magnetic field. This ferromagnetic layer is generally called a free layer and has the function of storing information. Currently, MTJ elements with an MR ratio of more than 50% are available. The MTJ elements are becoming the mainstream of MRAM development.
In the write mode of an MRAM using MTJ elements, to reverse the magnetization direction of the free layer, currents having predetermined magnitudes or more are supplied to bit lines and word lines, which pass through memory cells while crossing perpendicularly. In accordance with the magnitude of a thus generated synthesized magnetic field, the magnetization direction of the free layer is controlled, thereby writing information.
Conversely, in a read mode, a voltage is applied between the two magnetic films of an MTJ element corresponding to a selected bit line, and a resistance is read from a current that flows through the MTJ element. Alternatively, a constant current is supplied to a selected MTJ element, and a voltage generated between two magnetic films is detected.
An example of an MRAM using MTJ elements is reported in, e.g., ISSCC2000 Digest of Technical Paper p. 128 “A 10 ns Read and Write Non-Volatile Memory Array using a Magnetic Tunnel Junction and FET Switch in each Cell”. However, the MRAM described in this reference is designed to store 1-bit data using two MOS transistors and two MTJ elements. Hence, it is difficult to increase the capacity or the degree of integration. If the capacity or the degree of integration is increased, the access speed may decrease due to an increase in parasitic capacitance or parasitic resistance.
To increase the capacity or the degree of integration, a structure which stores 1-bit data using one selection element (MOS transistor or diode) and one MTJ element has been proposed. In addition, a structure which is called a cross-point structure has also been proposed, which requires no cell selection element for a memory cell, i.e., stores 1-bit data using one MTJ element. When the cross-point memory cell is used, the read speed may decrease, or the read margin may become small. Further improvements are demanded.